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AMD Athlon 6 Spezifikationen Seite 13

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Product Errata 13
Revision Guide for AMD Athlon™ 64 and AMD Opteron™ Processors
25759 Rev. 3.79 July 2009
Product Errata
This section documents product errata for the processors. A unique tracking number for each erratum
has been assigned within this document for user convenience in tracking the errata within specific
revision levels. Table 5 cross-references the revisions of the part to each erratum. An “X” indicates
that the erratum applies to the revision. The absence of an “X” indicates that the erratum does not
apply to the revision. An “*” indicates advance information that the erratum has been fixed but not yet
verified. “No fix planned” indicates that no fix is planned for current or future revisions of the
processor.
Note: There may be missing errata numbers. Errata that have been resolved from early revisions of
the processor have been deleted, and errata that have been reconsidered may have been
deleted or renumbered.
Table 5. Cross-Reference of Product Revision to Errata
No. Errata Description
Revision Number
SH-B3
SH-C0
SH-CG
DH-CG
CH-CG
SH-D0
DH-D0
CH-D0
JH-E1
DH-E3
SH-E4
BH-E4
SH-E5
DH-E6
JH-E6
1 Inconsistent Global Page Mappings Can Lead to
Machine Check Error
No fix planned
51 Arbitrated Interrupt With Illegal Vector Sets APIC
Error Bit In All Processors
XXXXX
52 Short LDTSTOP_L Deassertion Can Result in
Elevated Processor Core Voltage
X
57 Some Data Cache Tag Eviction Errors Are
Reported As Snoop Errors
No fix planned
58 Memory Latency with Processor Power States X
60 Single Machine Check Error May Report Overflow No fix planned
61 Real Mode RDPMC with Illegal ECX May Cause
Unpredictable Operation
X
62 Task Gates With Breakpoints Enabled May Cause
Unexpected Faults
X
63 TLB Flush Filter Causes Coherency Problem in
Multiprocessor Systems
X
64 Single Step Across I/O SMI Skips One Debug Trap X
65 Uncorrectable NB Machine Check Error May
Disrupt Power Management
X
66 Upstream Read Response Delayed by
Downstream Posted Writes
X
68 Disable DQS Hysteresis Bit Not Readable X
69 Multiprocessor Coherency Problem with Hardware
Prefetch Mechanism
X
70 Microcode Patch Loading in 64-bit Mode Fails To
Use EDX
X
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