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26 Electrical Data Chapter 6

AMD Duron™ Processor Data Sheet 23802E—September 2000

Preliminary Information

6.12 AMD System Bus AC Characteristics

The AC characteristics of the AMD Duron processor system bus

are shown in Table 13. The parameters are grouped based on

the source or destination of the signals involved.

Table 13. AMD System Bus AC Characteristics

Group Symbol Parameter Min Max Units Notes

All Signals

RISE

Output Rise Slew Rate 1 3 V/ns 1

FALL

Output Fall Slew Rate 1 3 V/ns 1

Forward Clocks

SKEW-

SAMEEDGE

Output skew with respect to

the same clock edge

385 ps 2

SKEW-

DIFFEDGE

Output skew with respect to a

different clock edge

770 ps 2

Input Data Setup Time 300 ps 3

Input Data Hold Time 300 ps 3

Capacitance on input Clocks 4 12 pF

OUT

Capacitance on output Clocks 4 12 pF

Sync

VAL

RSTCLK to Output Valid 250 2000 ps 5

Setup to RSTCLK 500 ps 6

Hold from RSTCLK 1000 ps 6

Notes:

1. Rise and fall time ranges are guidelines over which the I/O has been characterized.

2. T

SKEW-SAMEEDGE

is the maximum skew within a clock forwarded group between any two signals or between any signal and

its forward clock, as measured at the package, with respect to the same clock edge.

SKEW-DIFFEDGE

is the maximum skew within a clock forwarded group between any two signals or between any signal and

its forward clock, as measured at the package, with respect to different clock edges.

3. Input SU and HD times are with respect to the appropriate Clock Forward Group input clock.

4. The synchronous signals include

PROCRDY, CONNECT, CLKFWDRST.

5. T

VAL

is RSTCLK rising edge to output valid for PROCRDY. Test Load—25pF.

6. T

is setup of CONNECT/CLKFWDRST to rising edge of RSTCLK. T

is hold of CONNECT/CLKFWDRST from rising edge

of RSTCLK.

1 2 ... 33 34 35 36 37 38 39 40 41 42 43 ... 83 84

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