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Chapter 7 Signal and Power-Up Requirements 31

23802E—September 2000 AMD Duron™ Processor Data Sheet

Preliminary Information

7 Signal and Power-Up Requirements

This chapter describes the AMD Duron™ processor power-up

requirements during system turn-on and warm resets. These

requirements can be adhered to with minor motherboard

modifications or the usage of a recommended system power

supply (silver box) for the specific motherboard. This

information is applicable to all current Socket A motherboards.

7.1 Power-Up Requirements

Signal Sequence and

Timing Description

The AMD Duron processor requires that the system clocks

(SYSCLK/SYSCLK#) to the processor be running prior to the

assertion of PWROK. PWROK is an output of the voltage

regulation circuit on the motherboard indicating that

VCC_CORE is valid to the processor. Figure 10 on page 32

shows the relationship between key signals in the system

during a power-up sequence. This figure details the

requirements of the processor.

Note: Figure 10 represents several signals generically by using

names not necessarily consistent with any pin lists or

schematics.

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