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Chapter 9 Pin Descriptions 57

23802E—September 2000 AMD Duron™ Processor Data Sheet

Preliminary Information

9.3 Detailed Pin Descriptions

The information in this section pertains to Table 19 on page 49.

A20M# Pin A20M# is an input from the system used to simulate address

wrap-around in the 20-bit 8086.

AMD Pin The motherboard should treat the AMD pin (AH6) as an NC pin.

A socket designer has the option of creating a top mold piece

that blocks this pin location. However, sockets that populate the

AMD pin must be allowed, so the motherboard must always

provide for a NC type pin at this pin location. AMD Socket A

processors do not implement a pin at location AH6. When a

socket that does not provide a pin hole at location AH6 is used,

a non-AMD PGA370 part does not fit into Socket A.

AMD System Bus Pins See the AMD System Bus Specification, order# 21902 for

information about the system bus pins—PROCRDY, PWROK,

RESET#, SADDIN[14:2]#, SADDINCLK#, SADDOUT[14:2]#,

SADDOUTCLK#, SCHECK[7:0]#, SDATA[63:0]#,

SDATAINCLK[3:0]#, SDATAINVAL#, SDATAOUTCLK[3:0]#,

SDATAOUTVAL#, SFILLVAL#.

Analog Pin Treat this pin as an NC.

CLKFWDRST Pin CLKFWDRST resets clock-forward circuitry for both the system

and processor.

CLKIN, RSTCLK

(SYSCLK) Pins

Connect CLKIN (AN17) with RSTCLK (AN19) and name it

SYSCLK. Connect CLKIN# (AL17) with RSTCLK# (AL19) and

name it SYSCLK#. Length match the clocks from the clock

generator to the Northbridge and processor. See “SYSCLK and

SYSCLK# Pins” on page 61 for more information.

CONNECT Pin CONNECT is an input from the system used for power

management and clock-forward initialization at reset.

COREFB and

COREFB# Pins

COREFB and COREFB# are outputs to the system that provide

AMD Duron processor core voltage feedback to the system.

DBRDY and DBREQ#

Pins

DBRDY (AA1) and DBREQ# (AA3) are routed to the debug

connector. DBREQ# is tied to VCC_CORE with a 1-kohm pullup.

1 2 ... 64 65 66 67 68 69 70 71 72 73 74 ... 83 84

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