AMD K5 Bedienungsanleitung PDF herunterladen (Seite 11)

18522F/0—Jan1997 AMD-K5 Processor Data Sheet

PRELIMINARY INFORMATION

1 AMD-K5™ Processor Features

■ Four-issue superscalar core with six parallel execution units

arranged in a five-stage pipeline

■ 16-Kbyte, dual-tagged, four-way, set-associative instruction

cache

■ 8-Kbyte, dual-tagged, dual-ported with four banks, four-way

set-associative, writeback data cache

■ Full, out-of-order speculative execution and completion

■ Dynamic cache line-oriented branch prediction with 1-Kbyte

branch predictions and low 3-cycle branch mispredict penalty

■ Integrated, high-performance floating-point unit (FPU) with

low-latency add/multiply and single-cycle issue

■ Static clock control with Phase Lock Loop (PLL) circuitry

■ 3.3-V operation and System Management Mode (SMM) for

lower power consumption

■ 64-bit Pentium-compatible bus and system interface in a 296-

pin SPGA package

■ Compatible with existing Pentium (P54C) support infrastruc-

ture and system designs

■ Fully compatible with the Microsoft

Windows

operating sys-

tems and the large installed library of x86 software

1.1 Redefining the Next Generation

AMD continues to bring superior, high-performance processor

solutions to the personal computer market. The AMD-K5 pro-

cessor offers superior price/performance value over other 5th-

generation processors—making it an ideal solution for main-

stream desktop computers. Compatible with the entire in-

stalled library of x86 software, the AMD-K5 processor is a

superior engine for the Microsoft Windows operating systems.

The AMD-K5 processor uses an independently developed

“superscalar RISC-based design” manufactured in AMD’s 0.35-

micron complementary metal-oxide semiconductor (CMOS)

process. The design stems from a rich history of experience in

RISC and x86 technology, providing a solid foundation for the

development of our proprietary 4.3-million-transistor AMD-K5

processor.

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AMD K5 Bedienungsanleitung Seite 11